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1
A dc-pulsed capacitively coupled planar Langmuir probe for plasma process diagnostics and monitoring
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Artigo
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A dc-pulsed capacitively coupled planar Langmuir probe for plasma process diagnostics and monitoring

Šamara, V ; Booth, J-P ; Marneffe, J-F de ; Milenin, A P ; Brouri, M ; Boullart, W

Plasma sources science & technology, 2012-12, Vol.21 (6), p.65004-1-8 [Periódico revisado por pares]

Bristol: IOP Publishing

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2
The SERS and TERS Effects Obtained by Gold Droplets on Top of Si Nanowires
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The SERS and TERS Effects Obtained by Gold Droplets on Top of Si Nanowires

Becker, M ; Sivakov, V ; Andrä, G ; Geiger, R ; Schreiber, J ; Hoffmann, S ; Michler, J ; Milenin, A. P ; Werner, P ; Christiansen, S. H

Nano letters, 2007-01, Vol.7 (1), p.75-80 [Periódico revisado por pares]

United States: American Chemical Society

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3
Integration aspects of strained Ge pFETs
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Integration aspects of strained Ge pFETs

Witters, L. ; Eneman, G. ; Mitard, J. ; Vincent, B. ; Hikavyy, A. ; Milenin, A.P. ; Mertens, S. ; Thean, A. ; Collaert, N.

Solid-state electronics, 2014-08, Vol.98, p.7-11 [Periódico revisado por pares]

Kidlington: Elsevier Ltd

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4
Plasma etching of proton-exchanged lithium niobate
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Plasma etching of proton-exchanged lithium niobate

Hu, H. ; Milenin, A. P. ; Wehrspohn, R. B. ; Hermann, H. ; Sohler, W.

Journal of Vacuum Science and Technology. A, International Journal Devoted to Vacuum, Surfaces, and Films, 2006-07, Vol.24 (4), p.1012-1015 [Periódico revisado por pares]

United States: American Vacuum Society

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5
Strained germanium quantum well p-FinFETs fabricated on 45nm Fin pitch using replacement channel, replacement metal gate and germanide-free local interconnect
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Ata de Congresso
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Strained germanium quantum well p-FinFETs fabricated on 45nm Fin pitch using replacement channel, replacement metal gate and germanide-free local interconnect

Witters, L ; Mitard, J ; Loo, R ; Demuynck, S ; Chew, SA ; Schram, T ; Tao, Z ; Hikavyy, A ; Sun, J W ; Milenin, A P ; Mertens, H ; Vrancken, C ; Favia, P ; Schaekers, M ; Bender, H ; Horiguchi, N ; Langer, R ; Barla, K ; Mocuta, D ; Collaert, N ; Thean, AV-Y

IEEE Conferences, 2015, p.T56-T57

Sem texto completo

6
Si-cap-free SiGe p-channel FinFETs and gate-all-around transistors in a replacement metal gate process: Interface trap density reduction and performance improvement by high-pressure deuterium anneal
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Si-cap-free SiGe p-channel FinFETs and gate-all-around transistors in a replacement metal gate process: Interface trap density reduction and performance improvement by high-pressure deuterium anneal

Mertens, H ; Ritzenthaler, R ; Arimura, H ; Franco, J ; Sebaai, F ; Hikavyy, A ; Pawlak, B J ; Machkaoutsan, V ; Devriendt, K ; Tsvetanova, D ; Milenin, A P ; Witters, L ; Dangol, A ; Vancoille, E ; Bender, H ; Badaroglu, M ; Holsteyns, F ; Barla, K ; Mocuta, D ; Horiguchi, N ; Thean, AV-Y

IEEE Conferences, 2015, p.T142-T143

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7
First Demonstration of Vertically Stacked Gate-All-Around Highly Strained Germanium Nanowire pFETs
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First Demonstration of Vertically Stacked Gate-All-Around Highly Strained Germanium Nanowire pFETs

Capogreco, E. ; Witters, L. ; Arimura, H. ; Sebaai, F. ; Porret, C. ; Hikavyy, A. ; Loo, R. ; Milenin, A. P. ; Eneman, G. ; Favia, P. ; Bender, H. ; Wostyn, K. ; Dentoni Litta, E. ; Schulze, A. ; Vrancken, C. ; Opdebeeck, A. ; Mitard, J. ; Langer, R. ; Holsteyns, F. ; Waldron, N. ; Barla, K. ; De Heyn, V. ; Mocuta, D. ; Collaert, N.

IEEE transactions on electron devices, 2018-11, Vol.65 (11), p.5145-5150 [Periódico revisado por pares]

New York: IEEE

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8
Strained Germanium Gate-All-Around pMOS Device Demonstration Using Selective Wire Release Etch Prior to Replacement Metal Gate Deposition
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Strained Germanium Gate-All-Around pMOS Device Demonstration Using Selective Wire Release Etch Prior to Replacement Metal Gate Deposition

Witters, L. ; Arimura, H. ; Sebaai, F. ; Hikavyy, A. ; Milenin, A. P. ; Loo, R. ; De Keersgieter, A. ; Eneman, G. ; Schram, T. ; Wostyn, K. ; Devriendt, K. ; Schulze, A. ; Lieten, R. ; Bilodeau, S. ; Cooper, E. ; Storck, P. ; Chiu, E. ; Vrancken, C. ; Favia, P. ; Vancoille, E. ; Mitard, J. ; Langer, R. ; Opdebeeck, A. ; Holsteyns, F. ; Waldron, N. ; Barla, K. ; De Heyn, V. ; Mocuta, D. ; Collaert, N.

IEEE transactions on electron devices, 2017-11, Vol.64 (11), p.4587-4593 [Periódico revisado por pares]

IEEE

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9
Self-aligned double patterning process for subtractive Ge fin fabrication at 45-nm pitch
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Self-aligned double patterning process for subtractive Ge fin fabrication at 45-nm pitch

Milenin, A.P. ; Witters, L. ; Barla, K. ; Thean, A.

Thin solid films, 2016-03, Vol.602, p.64-67 [Periódico revisado por pares]

Elsevier B.V

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10
Study on metrology of ERU tuning in TCP reactor, using PVx2 sensor wafer
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Study on metrology of ERU tuning in TCP reactor, using PVx2 sensor wafer

Milenin, A P ; de Marneffe, J F ; Struyf, H ; Boullart, W ; Arleo, P

2010 IEEE/SEMI Advanced Semiconductor Manufacturing Conference (ASMC), 2010, p.34-38 [Periódico revisado por pares]

IEEE

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