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A 0.004-mm ^ Portable Multiphase Clock Generator Tile for 1.2-GHz RISC Microprocessor

Jung, Inhwa ; Jung, Gunok ; Song, Janghoon ; Kim, Moo-Young ; Park, Junyoung ; Park, Sung Bae ; Kim, Chulwoo

IEEE transactions on circuits and systems. II, Express briefs, 2008-02, Vol.55 (2), p.116-120 [Periódico revisado por pares]

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Título:
A 0.004-mm ^ Portable Multiphase Clock Generator Tile for 1.2-GHz RISC Microprocessor
Autor: Jung, Inhwa ; Jung, Gunok ; Song, Janghoon ; Kim, Moo-Young ; Park, Junyoung ; Park, Sung Bae ; Kim, Chulwoo
Assuntos: Clocks ; CMOS technology ; Digital clock generator ; Energy consumption ; fast lock time ; Frequency ; Jitter ; low jitter ; low power ; Microprocessors ; Phase locked loops ; Power generation ; Reduced instruction set computing
É parte de: IEEE transactions on circuits and systems. II, Express briefs, 2008-02, Vol.55 (2), p.116-120
Notas: ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
Descrição: Portable multiphase clock generators capable of adjusting its clock phase according to input clock frequencies have been developed both in a 0.18-mum and in a 0.13-mum CMOS technologies. They consist of a full-digital CMOS circuit design that leads to a simple, robust, and portable IP. In addition, their open-loop architecture lead to no jitter accumulation and one-cycle lock characteristic that enables clock-on-demand circuit structures. The implemented low power clock generator tile in a 0.13-mum CMOS technology occupies only 0.004 mm 2 and operates at variable input frequencies ranging from 625 MHz to 1.2 GHz within a plusmn 2% phase error having one-cycle lock time.
Editor: IEEE
Idioma: Inglês

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