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A 120 MHz SC 4th-order elliptic interpolation filter with accurate gain and offset compensation for direct digital frequency synthesizer

Seng-Pan U ; Neves, R. ; Martins, R.P. ; Franca, J.E.

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360), 1999, p.1-4

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Título:
A 120 MHz SC 4th-order elliptic interpolation filter with accurate gain and offset compensation for direct digital frequency synthesizer
Autor: Seng-Pan U ; Neves, R. ; Martins, R.P. ; Franca, J.E.
Assuntos: Circuits ; CMOS technology ; Delay lines ; Design optimization ; Digital filters ; Frequency synthesizers ; IIR filters ; Interpolation ; Sampling methods ; Wideband
É parte de: AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360), 1999, p.1-4
Descrição: This paper proposes an optimum design of a high frequency Switched-Capacitor IIR interpolation filter for Direct Digital Frequency Synthesizer systems. The circuit is formed by the combination of novel double sampling recursive direct-form II and non-recursive polyphase structures embedding mismatch-free analog delay lines with accurate, wideband gain- and offset-compensation achieved by Predictive Correlated-Double Sampling techniques. This filter is designed with optimized speed of the analog components in AMS 0.35 /spl mu/m CMOS technology, occupies about 0.4 mm/sup 2/ active area and consumes about 22 mW at 3.0 V supply.
Editor: IEEE
Idioma: Inglês

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