A 1.8 pJ/bit [Formula Omitted] Source-Synchronous Parallel Interface in 32 nm SOI CMOS with Receiver Redundancy for Link Recalibration

Dickson, Timothy O ; Liu, Yong ; Agrawal, Ankur ; Bulzacchelli, John F ; Ainspan, Herschel A ; Toprak-Deniz, Zeynep ; Parker, Benjamin D ; Beakes, Michael P ; Meghelli, Mounir ; Friedman, Daniel J

IEEE journal of solid-state circuits, 2016-08, Vol.51 (8), p.1744 [Periódico revisado por pares]

New York: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)

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