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Refinado por: Nome da Publicação: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems remover assunto: Integrated Circuit Modeling remover
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Highly accurate and simple models for CML and ECL gates
Highly accurate and simple models for CML and ECL gates
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Highly accurate and simple models for CML and ECL gates

Alioto, M. ; Palumbo, G.

IEEE transactions on computer-aided design of integrated circuits and systems, 1999-09, Vol.18 (9), p.1369-1375 [Periódico revisado por pares]

New York, NY: IEEE

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2
Accurate Simulation of High-Gain MMIC Amplifiers With Microstrip-Type Transistors
Accurate Simulation of High-Gain MMIC Amplifiers With Microstrip-Type Transistors
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Accurate Simulation of High-Gain MMIC Amplifiers With Microstrip-Type Transistors

Fu, Mingye ; Jiang, Nianhua ; Bornemann, Jens ; Feng, Quanyuan

IEEE transactions on computer-aided design of integrated circuits and systems, 2023-01, Vol.42 (1), p.16-26 [Periódico revisado por pares]

New York: IEEE

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3
Germanium-and Silicon-Nanotransistor Designs by Electrical and Thermal Self-Consistent Analysis
Germanium-and Silicon-Nanotransistor Designs by Electrical and Thermal Self-Consistent Analysis
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Germanium-and Silicon-Nanotransistor Designs by Electrical and Thermal Self-Consistent Analysis

Sugiura, Takaya ; Yamakiri, Shiun ; Nakano, Nobuhiko

IEEE transactions on computer-aided design of integrated circuits and systems, 2023-10, Vol.42 (10), p.1-1 [Periódico revisado por pares]

New York: IEEE

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4
A New Compact MOSFET Model Based on Artificial Neural Network With Unique Data Preprocessing and Sampling Techniques
A New Compact MOSFET Model Based on Artificial Neural Network With Unique Data Preprocessing and Sampling Techniques
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A New Compact MOSFET Model Based on Artificial Neural Network With Unique Data Preprocessing and Sampling Techniques

Wei, Jiahao ; Wang, Haihua ; Zhao, Tian ; Jiang, Yu-Long ; Wan, Jing

IEEE transactions on computer-aided design of integrated circuits and systems, 2023-04, Vol.42 (4), p.1250-1254 [Periódico revisado por pares]

New York: IEEE

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5
GNN4REL: Graph Neural Networks for Predicting Circuit Reliability Degradation
GNN4REL: Graph Neural Networks for Predicting Circuit Reliability Degradation
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GNN4REL: Graph Neural Networks for Predicting Circuit Reliability Degradation

Alrahis, Lilas ; Knechtel, Johann ; Klemme, Florian ; Amrouch, Hussam ; Sinanoglu, Ozgur

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-11, Vol.41 (11), p.1-1 [Periódico revisado por pares]

New York: IEEE

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6
SPICE Compact BJT, MOSFET, and JFET Models for ICs Simulation in the Wide Temperature Range (From −200 °C to +300 °C)
SPICE Compact BJT, MOSFET, and JFET Models for ICs Simulation in the Wide Temperature Range (From −200 °C to +300 °C)
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SPICE Compact BJT, MOSFET, and JFET Models for ICs Simulation in the Wide Temperature Range (From −200 °C to +300 °C)

Petrosyants, Konstantin O. ; Sambursky, Lev M. ; Kozhukhov, Maxim V. ; Ismail-Zade, Mamed R. ; Kharitonov, Igor A. ; Li, Bo

IEEE transactions on computer-aided design of integrated circuits and systems, 2021-04, Vol.40 (4), p.708-722 [Periódico revisado por pares]

New York: IEEE

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7
Ferroelectric FET-Based Implementation of FitzHugh-Nagumo Neuron Model
Ferroelectric FET-Based Implementation of FitzHugh-Nagumo Neuron Model
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Ferroelectric FET-Based Implementation of FitzHugh-Nagumo Neuron Model

Rajasekharan, Dinesh ; Gaidhane, Amol ; Trivedi, Amit Ranjan ; Chauhan, Yogesh Singh

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-07, Vol.41 (7), p.2107-2114 [Periódico revisado por pares]

New York: IEEE

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8
Method for the Computer-Aided Schematic Design and Simulation of Hydrogel-Based Microfluidic Systems
Method for the Computer-Aided Schematic Design and Simulation of Hydrogel-Based Microfluidic Systems
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Method for the Computer-Aided Schematic Design and Simulation of Hydrogel-Based Microfluidic Systems

Voigt, Andreas ; Schreiter, Jorg ; Frank, Philipp ; Pini, Cesare ; Mayr, Christian ; Richter, Andreas

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-08, Vol.39 (8), p.1635-1648 [Periódico revisado por pares]

New York: IEEE

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9
Analog Circuit Yield Optimization via Freeze-Thaw Bayesian Optimization Technique
Analog Circuit Yield Optimization via Freeze-Thaw Bayesian Optimization Technique
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Analog Circuit Yield Optimization via Freeze-Thaw Bayesian Optimization Technique

Wang, Xiaodong ; Yan, Changhao ; Ma, Yuzhe ; Yu, Bei ; Yang, Fan ; Zhou, Dian ; Zeng, Xuan

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-11, Vol.41 (11), p.4887-4900 [Periódico revisado por pares]

New York: IEEE

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10
High-Dimensional Bayesian Optimization for Analog Integrated Circuit Sizing Based on Dropout and g/I Methodology
High-Dimensional Bayesian Optimization for Analog Integrated Circuit Sizing Based on Dropout and g/I Methodology
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High-Dimensional Bayesian Optimization for Analog Integrated Circuit Sizing Based on Dropout and g/I Methodology

Chen, Chen ; Wang, Hongyi ; Song, Xinyue ; Liang, Feng ; Wu, Kaikai ; Tao, Tao

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-11, Vol.41 (11), p.4808-4820 [Periódico revisado por pares]

New York: IEEE

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