Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
---|---|---|---|
1 |
Material Type: Artigo
|
Binary Decision DiagramsAkersIEEE transactions on computers, 1978-06, Vol.C-27 (6), p.509-516 [Periódico revisado por pares]IEEETexto completo disponível |
|
2 |
Material Type: Artigo
|
Synthesis of Ternary Logic Circuits Using 2:1 MultiplexersVudadha, Chetan ; Surya, Ajay ; Agrawal, Saurabh ; Srinivas, M. B.IEEE transactions on circuits and systems. I, Regular papers, 2018-12, Vol.65 (12), p.4313-4325 [Periódico revisado por pares]New York: IEEETexto completo disponível |
|
3 |
Material Type: Ata de Congresso
|
BDD-based synthesis of reversible logic for large functionsWille, Robert ; Drechsler, Rolf2009 46th ACM/IEEE Design Automation Conference, 2009, p.270-275ACMTexto completo disponível |
|
4 |
Material Type: Ata de Congresso
|
Dynamic Minimization of Bi-Kronecker Functional Decision DiagramsHuang, Xuanxiang ; Che, Haipeng ; Fang, Liangda ; Chen, Qingliang ; Guan, Quanlong ; Deng, Yuhui ; Su, Kaile2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2020, p.1-9Association on Computer MachineryTexto completo disponível |
|
5 |
Material Type: Artigo
|
Decision Diagram Based Methods and Complexity Analysis for Multi-State SystemsShrestha, A. ; Liudong Xing ; Yuanshun DaiIEEE transactions on reliability, 2010-03, Vol.59 (1), p.145-161 [Periódico revisado por pares]New York: IEEETexto completo disponível |
|
6 |
Material Type: Artigo
|
Efficient Formal Verification of Galois-Field Arithmetic Circuits Using ZDD Representation of Boolean PolynomialsIto, Akira ; Ueno, Rei ; Homma, NaofumiIEEE transactions on computer-aided design of integrated circuits and systems, 2022-03, Vol.41 (3), p.794-798 [Periódico revisado por pares]New York: IEEETexto completo disponível |
|
7 |
Material Type: Artigo
|
Reversible Logic Synthesis Using Binary Decision Diagrams With Exploiting Efficient Reordering OperatorsAbdalhaq, Baker K ; Awad, Ahmed ; Hawash, AmjadIEEE access, 2020, Vol.8, p.156001-156016 [Periódico revisado por pares]Piscataway: IEEETexto completo disponível |
|
8 |
Material Type: Artigo
|
Chain Reduction for Binary and Zero-Suppressed Decision DiagramsBryant, Randal E.Journal of automated reasoning, 2020-10, Vol.64 (7), p.1361-1391 [Periódico revisado por pares]Dordrecht: Springer NetherlandsTexto completo disponível |
|
9 |
Material Type: Artigo
|
Symbolic model checking for Dynamic Epistemic Logic — S5 and beyondvan Benthem, Johan ; van Eijck, Jan ; Gattinger, Malvin ; Su, KaileJournal of logic and computation, 2018-03, Vol.28 (2), p.367-402 [Periódico revisado por pares]Texto completo disponível |
|
10 |
Material Type: Artigo
|
An extension of first-order LTL with rules with application to runtime verificationHavelund, Klaus ; Peled, DoronInternational journal on software tools for technology transfer, 2021-08, Vol.23 (4), p.547-563 [Periódico revisado por pares]Berlin/Heidelberg: Springer Berlin HeidelbergTexto completo disponível |