Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
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Material Type: Artigo
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Support-Reducing Decomposition for FPGA MappingMachado, Lucas ; Cortadella, JordiIEEE transactions on computer-aided design of integrated circuits and systems, 2020-01, Vol.39 (1), p.213-224 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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2 |
Material Type: Artigo
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Constraint Solving for Synthesis and Verification of Threshold Logic CircuitsLee, Nian-Ze ; Jiang, Jie-Hong R.IEEE transactions on computer-aided design of integrated circuits and systems, 2021-05, Vol.40 (5), p.904-917 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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3 |
Material Type: Artigo
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Synthesis of reversible logic circuitsShende, V.V. ; Prasad, A.K. ; Markov, I.L. ; Hayes, J.P.IEEE transactions on computer-aided design of integrated circuits and systems, 2003-06, Vol.22 (6), p.710-722 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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4 |
Material Type: Artigo
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An Efficient Power Optimization Approach for Fixed Polarity Reed-Muller Logic Circuits Based on Metaheuristic Optimization AlgorithmZhou, Yuhao ; He, Zhenxue ; Chen, Chen ; Wang, Tao ; Xiao, Limin ; Wang, XiangIEEE transactions on computer-aided design of integrated circuits and systems, 2022-12, Vol.41 (12), p.5380-5393 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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5 |
Material Type: Artigo
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Reliability Analysis of Multiple-Outputs Logic Circuits Based on Structure Function ApproachKvassay, Miroslav ; Zaitseva, Elena ; Levashenko, Vitaly ; Kostolny, JozefIEEE transactions on computer-aided design of integrated circuits and systems, 2017-03, Vol.36 (3), p.398-411 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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6 |
Material Type: Artigo
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Soft-Error-Rate-Analysis (SERA) MethodologyMing Zhang ; Shanbhag, N.R.IEEE transactions on computer-aided design of integrated circuits and systems, 2006-10, Vol.25 (10), p.2140-2155 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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7 |
Material Type: Artigo
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Circuit Reliability Analysis Using Symbolic TechniquesMiskov-Zivanov, N. ; Marculescu, D.IEEE transactions on computer-aided design of integrated circuits and systems, 2006-12, Vol.25 (12), p.2638-2649 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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8 |
Material Type: Artigo
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The Promise and Challenge of Stochastic ComputingAlaghi, Armin ; Qian, Weikang ; Hayes, John P.IEEE transactions on computer-aided design of integrated circuits and systems, 2018-08, Vol.37 (8), p.1515-1531 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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9 |
Material Type: Artigo
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Incremental SAT-Based Reverse Engineering of Camouflaged Logic CircuitsCunxi Yu ; Xiangyu Zhang ; Duo Liu ; Ciesielski, Maciej ; Holcomb, DanielIEEE transactions on computer-aided design of integrated circuits and systems, 2017-10, Vol.36 (10), p.1647-1659 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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10 |
Material Type: Artigo
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ARA-RCIV: Identifying Reliability-Critical Input Vectors of Logic Circuits Based on the Association Rules Analysis ApproachShi, Zhanhui ; Xiao, Jie ; Jiang, Jianhui ; Zhang, Ying ; Zhou, YuhaoIEEE transactions on computer-aided design of integrated circuits and systems, 2024-08, Vol.43 (8), p.2479-2492 [Periódico revisado por pares]New York: IEEETexto completo disponível |