Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
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1 |
Material Type: Artigo
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A Novel Table-Based Approach for Design of FinFET CircuitsThakker, R.A. ; Sathe, C. ; Sachid, A.B. ; Shojaei Baghini, M. ; Ramgopal Rao, V. ; Patil, M.B.IEEE transactions on computer-aided design of integrated circuits and systems, 2009-07, Vol.28 (7), p.1061-1070 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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2 |
Material Type: Artigo
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A Table-Based Approach to Study the Impact of Process Variations on FinFET Circuit PerformanceThakker, R.A. ; Sathe, C. ; Baghini, M.S. ; Patil, M.B.IEEE transactions on computer-aided design of integrated circuits and systems, 2010-04, Vol.29 (4), p.627-631 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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3 |
Material Type: Artigo
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An efficient algorithm for finding multiple DC solutions based on the SPICE-oriented Newton homotopy methodUshida, A. ; Yamagami, Y. ; Nishio, Y. ; Kinouchi, I. ; Inoue, Y.IEEE transactions on computer-aided design of integrated circuits and systems, 2002-03, Vol.21 (3), p.337-348 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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4 |
Material Type: Artigo
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ESDInspector: a new layout-level ESD protection circuitry design verification tool using a smart-parametric checking mechanismRouying Zhan ; Haigang Feng ; Qiong Wu ; Haolu Xie ; Xiaokang Guan ; Guang Chen ; Wang, A.Z.H.IEEE transactions on computer-aided design of integrated circuits and systems, 2004-10, Vol.23 (10), p.1421-1428 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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5 |
Material Type: Artigo
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Highly accurate and simple models for CML and ECL gatesAlioto, M. ; Palumbo, G.IEEE transactions on computer-aided design of integrated circuits and systems, 1999-09, Vol.18 (9), p.1369-1375 [Periódico revisado por pares]New York, NY: IEEETexto completo disponível |
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6 |
Material Type: Artigo
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A framework for testing special-purpose memoriesSidorowicz, P.R. ; Brzozowski, J.A.IEEE transactions on computer-aided design of integrated circuits and systems, 2002-12, Vol.21 (12), p.1459-1468 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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7 |
Material Type: Artigo
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Modeling of avalanche generation current of bipolar junction transistors for computer circuit simulationDivekar, D.A. ; Lovelace, R.E.IEEE transactions on computer-aided design of integrated circuits and systems, 1982-07, Vol.1 (3), p.112-116 [Periódico revisado por pares]IEEETexto completo disponível |
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8 |
Material Type: Artigo
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Practical Integration of Process, Device, and Circuit SimulationSokel, R.I. ; MacMillen, D.B.IEEE transactions on computer-aided design of integrated circuits and systems, 1985-10, Vol.4 (4), p.554-560 [Periódico revisado por pares]IEEETexto completo disponível |
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9 |
Material Type: Artigo
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SPICE Compact BJT, MOSFET, and JFET Models for ICs Simulation in the Wide Temperature Range (From −200 °C to +300 °C)Petrosyants, Konstantin O. ; Sambursky, Lev M. ; Kozhukhov, Maxim V. ; Ismail-Zade, Mamed R. ; Kharitonov, Igor A. ; Li, BoIEEE transactions on computer-aided design of integrated circuits and systems, 2021-04, Vol.40 (4), p.708-722 [Periódico revisado por pares]New York: IEEETexto completo disponível |
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10 |
Material Type: Artigo
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A Comprehensive Evaluation of Integrated Circuits Side-Channel Resilience Utilizing Three-Independent-Gate Silicon Nanowire Field Effect Transistors-Based Current Mode LogicLiu, Yanjiang ; He, Jiaji ; Ma, Haocheng ; Qu, Tongzhou ; Dai, ZibinIEEE transactions on computer-aided design of integrated circuits and systems, 2022-10, Vol.41 (10), p.3228-3238 [Periódico revisado por pares]New York: IEEETexto completo disponível |