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Refinado por: autor: Wang, Zhihua remover
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1
A 14-bit 250 MS/s IF Sampling Pipelined ADC in 180 nm CMOS Process
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A 14-bit 250 MS/s IF Sampling Pipelined ADC in 180 nm CMOS Process

Zheng, Xuqiang ; Wang, Zhijun ; Li, Fule ; Zhao, Feng ; Yue, Shigang ; Zhang, Chun ; Wang, Zhihua

IEEE transactions on circuits and systems. I, Regular papers, 2016-09, Vol.63 (9), p.1381-1392 [Periódico revisado por pares]

New York: IEEE

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2
A 7.9 μA multi-step phase-domain ADC for GFSK demodulators
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A 7.9 μA multi-step phase-domain ADC for GFSK demodulators

Gao, Shaoquan ; Jiang, Hanjun ; Weng, Zhaoyang ; Guo, Yanshu ; Dong, Jingjing ; Li, Fule ; Wang, Zhihua

Analog integrated circuits and signal processing, 2018, Vol.94 (1), p.49-63 [Periódico revisado por pares]

New York: Springer US

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3
A 14-bit 200-Ms/s SHA-Less Pipelined ADC With Aperture Error Reduction
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A 14-bit 200-Ms/s SHA-Less Pipelined ADC With Aperture Error Reduction

Yang, Peilin ; Wang, Xiao ; Wang, Chengwei ; Li, Fule ; Jiang, Hanjun ; Wang, Zhihua

IEEE transactions on very large scale integration (VLSI) systems, 2020-09, Vol.28 (9), p.2004-2013 [Periódico revisado por pares]

New York: IEEE

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4
A 1-GHz 1.6-mW Auto-Calibrated Bit Slicer for Energy/Envelope Detection Receivers
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A 1-GHz 1.6-mW Auto-Calibrated Bit Slicer for Energy/Envelope Detection Receivers

Huang, Xiaohua ; Liu, Dang ; Rhee, Woogeun ; Wang, Zhihua

IEEE transactions on circuits and systems. II, Express briefs, 2018-05, Vol.65 (5), p.587-591 [Periódico revisado por pares]

New York: IEEE

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5
A 0.6V 12-Bit Binary-Scaled Redundant SAR ADC with 83dB SFDR
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Ata de Congresso
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A 0.6V 12-Bit Binary-Scaled Redundant SAR ADC with 83dB SFDR

Luo, Deng ; Zhang, Milin ; Wang, Zhihua

2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, p.1-4

IEEE

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6
A 7.9μA 4-bit 4Msps successive approximation phase-domain ADC for GFSK demodulator
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A 7.9μA 4-bit 4Msps successive approximation phase-domain ADC for GFSK demodulator

Shaoquan Gao ; Hanjun Jiang ; Zhaoyang Weng ; Yanshu Guo ; Jingjing Dong ; Zhihua Wang

2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, p.1-4

IEEE

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7
A low-power DC offset calibration method independent of IF gain for zero-IF receiver
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A low-power DC offset calibration method independent of IF gain for zero-IF receiver

Dong, JingJing ; Jiang, HanJun ; Zhang, LingWei ; Wei, JianJun ; Li, FuLe ; Zhang, Chun ; Wang, ZhiHua

Science China. Information sciences, 2014-10, Vol.57 (10), p.1-10 [Periódico revisado por pares]

Heidelberg: Science China Press

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8
Phase self-calibrated scheme for zero-IF receiver
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Phase self-calibrated scheme for zero-IF receiver

Huang, Shuilong ; Wang, Zhihua

Analog integrated circuits and signal processing, 2007-04, Vol.51 (1), p.33-37 [Periódico revisado por pares]

New York: Springer Nature B.V

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9
A 13-bit 160MS/s pipelined subranging-SAR ADC with low-offset dynamic comparator
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A 13-bit 160MS/s pipelined subranging-SAR ADC with low-offset dynamic comparator

Weitao Li ; Fule Li ; Jia Liu ; Hongyu Li ; Zhihua Wang

2017 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2017, p.225-228

IEEE

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10
A 12-b 100MS/s low-power successive approximation register ADC in 65nm COMS
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A 12-b 100MS/s low-power successive approximation register ADC in 65nm COMS

Qing Wang ; Libing Zhou ; Zhou Peng ; Dongmei Li ; Zhihua Wang

2014 IEEE International Conference on Electron Devices and Solid-State Circuits, 2014, p.1-2

IEEE

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