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Refinado por: tipo de recurso: Anais de Congresso remover Base de dados/Biblioteca: IEEE Electronic Library (IEL) Conference Proceedings remover
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1
Learning disturbances in autonomous excavation
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Learning disturbances in autonomous excavation

Maeda, G. J. ; Rye, D. C.

2012 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2012, p.2599-2605

IEEE

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2
New CMOS logarithmic A/D converters employing pipeline and algorithmic architectures
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New CMOS logarithmic A/D converters employing pipeline and algorithmic architectures

Guilherme, J. ; Franca, J.E.

1995 IEEE International Symposium on Circuits and Systems (ISCAS), 1995, Vol.1, p.529-532 vol.1

IEEE

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3
Improving operational space control of heavy manipulators via open-loop compensation
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Improving operational space control of heavy manipulators via open-loop compensation

Maeda, G. J. ; Singh, S. P. N. ; Rye, D. C.

2011 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2011, p.725-731

IEEE

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4
A reconfigurable A/D converter for 4G wireless systems
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A reconfigurable A/D converter for 4G wireless systems

Silva, Artur ; Horta, Nuno ; Guilherme, Jorge

2008 IEEE International Symposium on Circuits and Systems, 2008, p.924-927

IEEE

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5
A fast histogram equalization and KDE to aid a supervised algorithm to count Eucalyptus seedlings
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A fast histogram equalization and KDE to aid a supervised algorithm to count Eucalyptus seedlings

Franze, Guilherme P. J. ; Woiski, Emanuel R.

2020 International Conference on Computational Science and Computational Intelligence (CSCI), 2020, p.1592-1598

IEEE

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6
A rad-hard DC-DC converter controller
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A rad-hard DC-DC converter controller

Silva, Bruno ; Horta, N. ; Guilherme, J.

2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2014, p.439-442

IEEE

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7
An evolutionary optimization kernel with adaptive parameters applied to analog circuit design
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An evolutionary optimization kernel with adaptive parameters applied to analog circuit design

Barros, M. ; Neves, G. ; Guilherme, J. ; Horta, N.

International Symposium on Signals, Circuits and Systems, 2005. ISSCS 2005, 2005, Vol.2, p.545-548 Vol. 2

IEEE

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8
A CMOS logarithmic pipeline A/D converter with a dynamic range of 80 dB
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A CMOS logarithmic pipeline A/D converter with a dynamic range of 80 dB

Guilherme, J. ; Vital, J. ; Franca, J.

9th International Conference on Electronics, Circuits and Systems, 2002, Vol.1, p.193-196 vol.1

IEEE

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9
A true logarithmic analog-to-digital pipeline converter with 1.5 bit/stage and digital correction
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A true logarithmic analog-to-digital pipeline converter with 1.5 bit/stage and digital correction

Guilherme, J. ; Vital, J. ; Franca, J.

ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483), 2001, Vol.1, p.393-396 vol.1

IEEE

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10
Design automation methodology for analog IC design matching designers approach
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Design automation methodology for analog IC design matching designers approach

Neves, G. ; Barros, M. ; Guilherme, J. ; Horta, N.

International Symposium on Signals, Circuits and Systems, 2005. ISSCS 2005, 2005, Vol.2, p.549-552 Vol. 2

IEEE

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