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1
Metastability behavior of mismatched cmos flip-flops using state diagram analysis
Metastability behavior of mismatched cmos flip-flops using state diagram analysis
Material Type:
Artigo de Congresso 		Adicionar ao Meu Espaço

Metastability behavior of mismatched cmos flip-flops using state diagram analysis

Wilhelmus Adrianus Maria Van Noije 1951- W T Liu; João Navarro Soares Junior; IEEE Custom Integrated Circuits Conference (1993 San Diego)

Proceedings New York : Ieee, 1993

New York Ieee 1993

Item não circula. Consulte sua biblioteca.(Acessar)

2
CMOS sampler with 1 gbit / s bandwidth and 25 ps resolution
CMOS sampler with 1 gbit / s bandwidth and 25 ps resolution
Material Type:
Artigo de Congresso 		Adicionar ao Meu Espaço

CMOS sampler with 1 gbit / s bandwidth and 25 ps resolution

Wilhelmus Adrianus Maria Van Noije 1951- C T Gray; W T Liu; T A Hughes; R K Cavin; W J Farlow; IEEE Custom Integrated Circuits Conference (1993 San Diego)

Proceedings New York : Ieee, 1993

New York Ieee 1993

Item não circula. Consulte sua biblioteca.(Acessar)

3
Precise final state determination of mismatched cmos latches
Precise final state determination of mismatched cmos latches
Material Type:
Artigo 		Adicionar ao Meu Espaço

Precise final state determination of mismatched cmos latches

Wilhelmus Adrianus Maria Van Noije 1951- W T Liu; João Navarro Soares Junior

New York v.30, n.5 , p.607-11, mai. 1995 Ieee Journal of Solid-State Circuits

New York 1995

Item não circula. Consulte sua biblioteca.(Acessar)

4
Sampling technique and its cmos implementation with 1 gb / s bandwith and 25 ps resolution
Sampling technique and its cmos implementation with 1 gb / s bandwith and 25 ps resolution
Material Type:
Artigo 		Adicionar ao Meu Espaço

Sampling technique and its cmos implementation with 1 gb / s bandwith and 25 ps resolution

C T Gray W Liu; Wilhelmus Adrianus Maria Van Noije 1951-; A Hugues Junior; R K Cavin

New York v.29, n.3 , p.340-9, mar. 1994 Ieee Journal of Solid-State Circuits

New York 1994

Item não circula. Consulte sua biblioteca.(Acessar)

5
Sampling technique and its cmos implementation with 1 gb / s bandwith and 25 ps resolution
Sampling technique and its cmos implementation with 1 gb / s bandwith and 25 ps resolution
Material Type:
Artigo 		Adicionar ao Meu Espaço

Sampling technique and its cmos implementation with 1 gb / s bandwith and 25 ps resolution

C T Gray W Liu; Wilhelmus Adrianus Maria Van Noije 1951-; A Hugues Junior; R K Cavin

New York v.29, n.3 , p.340-9, mar. 1994 Ieee Journal of Solid-State Circuits

New York 1994

Item não circula. Consulte sua biblioteca.(Acessar)

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Deste Autor:

  1. LIU, W
  2. Van Noije, W
  3. Cavin, R
  4. Gray, C
  5. Hugues Junior, A

  • Realização: ABCD-USP USP   Logos de Redes Sociais: Freepik

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