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Refinado por: Nome da Publicação: Ieee Transactions On Electron Devices remover assunto: Silicon remover
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2-D Analytical Modeling of the Electrical Characteristics of Dual-Material Double-Gate TFETs With a SiO2/HfO2 Stacked Gate-Oxide Structure
2-D Analytical Modeling of the Electrical Characteristics of Dual-Material Double-Gate TFETs With a SiO2/HfO2 Stacked Gate-Oxide Structure
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2-D Analytical Modeling of the Electrical Characteristics of Dual-Material Double-Gate TFETs With a SiO2/HfO2 Stacked Gate-Oxide Structure

Kumar, Sanjay ; Goel, Ekta ; Singh, Kunal ; Singh, Balraj ; Singh, Prince Kumar ; Baral, Kamalaksha ; Jit, Satyabrata

IEEE transactions on electron devices, 2017-03, Vol.64 (3), p.960-968 [Periódico revisado por pares]

New York: IEEE

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2
Experiments of a Novel Low-Voltage LDMOS With Ultrashallow Low-Resistance Path Modulated by Bulk Superjunction
Experiments of a Novel Low-Voltage LDMOS With Ultrashallow Low-Resistance Path Modulated by Bulk Superjunction
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Experiments of a Novel Low-Voltage LDMOS With Ultrashallow Low-Resistance Path Modulated by Bulk Superjunction

Zhang, Sen ; Song, Liang ; Liu, Teng ; Jin, Huajun ; Li, Yongshun ; He, Nailong ; Sun, Weifeng

IEEE transactions on electron devices, 2024-01, Vol.71 (1), p.448-452 [Periódico revisado por pares]

New York: IEEE

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3
Numerical Study of SiC MOSFET With Integrated n-/n-Type Poly-Si/SiC Heterojunction Freewheeling Diode
Numerical Study of SiC MOSFET With Integrated n-/n-Type Poly-Si/SiC Heterojunction Freewheeling Diode
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Numerical Study of SiC MOSFET With Integrated n-/n-Type Poly-Si/SiC Heterojunction Freewheeling Diode

Yu, Hengyu ; Liang, Shiwei ; Liu, Hangzhi ; Wang, Jun ; Shen, Z. John

IEEE transactions on electron devices, 2021-09, Vol.68 (9), p.4571-4576 [Periódico revisado por pares]

New York: IEEE

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4
Nonvolatile and Voltage-Polarity-Independent Write-Once–Read-Many-Times Memory Feature of an Al/AlO ₓ :N/n⁺-Si Device
Nonvolatile and Voltage-Polarity-Independent Write-Once–Read-Many-Times Memory Feature of an Al/AlO ₓ :N/n⁺-Si Device
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Nonvolatile and Voltage-Polarity-Independent Write-Once–Read-Many-Times Memory Feature of an Al/AlO ₓ :N/n⁺-Si Device

Hsu, Chih-Chieh ; Chien, Yu-Sheng ; Jhang, Wun-Ciang

IEEE transactions on electron devices, 2022-05, Vol.69 (5), p.2732-2737 [Periódico revisado por pares]

New York: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)

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5
New Super-Junction LDMOS Breaking Silicon Limit by Multi-Ring Assisted Depletion Substrate
New Super-Junction LDMOS Breaking Silicon Limit by Multi-Ring Assisted Depletion Substrate
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New Super-Junction LDMOS Breaking Silicon Limit by Multi-Ring Assisted Depletion Substrate

Duan, Baoxing ; Li, Mingzhe ; Dong, Ziming ; Wang, Yandong ; Yang, Yintang

IEEE transactions on electron devices, 2019-11, Vol.66 (11), p.4836-4841 [Periódico revisado por pares]

New York: IEEE

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6
Modeling of Electrostatics and Currents in a Forward-Biased p-n Junction
Modeling of Electrostatics and Currents in a Forward-Biased p-n Junction
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Modeling of Electrostatics and Currents in a Forward-Biased p-n Junction

Lin, Kuan-Wun ; Taur, Yuan

IEEE transactions on electron devices, 2024-08, Vol.71 (8), p.4489-4497 [Periódico revisado por pares]

IEEE

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7
Design and Performance Optimization of Novel Core-Shell Dopingless GAA-Nanotube TFET With Si0.5Ge0.5-Based Source
Design and Performance Optimization of Novel Core-Shell Dopingless GAA-Nanotube TFET With Si0.5Ge0.5-Based Source
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Design and Performance Optimization of Novel Core-Shell Dopingless GAA-Nanotube TFET With Si0.5Ge0.5-Based Source

Apoorva ; Kumar, Naveen ; Amin, S. Intekhab ; Anand, Sunny

IEEE transactions on electron devices, 2020-03, Vol.67 (3), p.789-795 [Periódico revisado por pares]

New York: IEEE

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8
A Highly Scalable Junctionless FET Leaky Integrate-and-Fire Neuron for Spiking Neural Networks
A Highly Scalable Junctionless FET Leaky Integrate-and-Fire Neuron for Spiking Neural Networks
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A Highly Scalable Junctionless FET Leaky Integrate-and-Fire Neuron for Spiking Neural Networks

Kamal, Neha ; Singh, Jawar

IEEE transactions on electron devices, 2021-04, Vol.68 (4), p.1633-1638 [Periódico revisado por pares]

New York: IEEE

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9
High-Performance 1-V ZnO Thin-Film Transistors With Ultrathin, ALD-Processed ZrO2 Gate Dielectric
High-Performance 1-V ZnO Thin-Film Transistors With Ultrathin, ALD-Processed ZrO2 Gate Dielectric
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High-Performance 1-V ZnO Thin-Film Transistors With Ultrathin, ALD-Processed ZrO2 Gate Dielectric

Yang, Jun ; Zhang, Yongpeng ; Wu, Qianqian ; Dussarrat, Christian ; Qi, Jie ; Zhu, Wenqing ; Ding, Xingwei ; Zhang, Jianhua

IEEE transactions on electron devices, 2019-08, Vol.66 (8), p.3382-3386 [Periódico revisado por pares]

New York: IEEE

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10
Enhancement of Silicon Critical Breakdown Field by Reducing the Avalanche Breakdown Distance to Improve the Breakdown Voltage of Thin SOI Device
Enhancement of Silicon Critical Breakdown Field by Reducing the Avalanche Breakdown Distance to Improve the Breakdown Voltage of Thin SOI Device
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Enhancement of Silicon Critical Breakdown Field by Reducing the Avalanche Breakdown Distance to Improve the Breakdown Voltage of Thin SOI Device

Wang, Yulong ; Duan, Baoxing ; Yang, Yintang

IEEE transactions on electron devices, 2023-06, Vol.70 (6), p.2905-2910 [Periódico revisado por pares]

New York: IEEE

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