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Refinado por: Nome da Publicação: Solid-State Electronics remover
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1
Tunnel FET with non-uniform gate capacitance for improved device and circuit level performance
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Tunnel FET with non-uniform gate capacitance for improved device and circuit level performance

Alper, C. ; De Michielis, L. ; Dağtekin, N. ; Lattanzio, L. ; Bouvet, D. ; Ionescu, A.M.

Solid-state electronics, 2013-06, Vol.84, p.205-210 [Periódico revisado por pares]

Kidlington: Elsevier Ltd

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2
The electron–hole bilayer tunnel FET
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The electron–hole bilayer tunnel FET

Lattanzio, Livio ; De Michielis, Luca ; Ionescu, Adrian M.

Solid-state electronics, 2012-08, Vol.74, p.85-90 [Periódico revisado por pares]

Elsevier Ltd

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3
Technological development of high-k dielectric FinFETs for liquid environment
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Technological development of high-k dielectric FinFETs for liquid environment

Rigante, S. ; Scarbolo, P. ; Bouvet, D. ; Wipf, M. ; Bedner, K. ; Ionescu, A.M.

Solid-state electronics, 2014-08, Vol.98, p.81-87 [Periódico revisado por pares]

Kidlington: Elsevier Ltd

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4
Asymmetrically strained all-silicon multi-gate n-Tunnel FETs
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Asymmetrically strained all-silicon multi-gate n-Tunnel FETs

Najmzadeh, M. ; Boucart, K. ; Riess, W. ; Ionescu, A.M.

Solid-state electronics, 2010-09, Vol.54 (9), p.935-941 [Periódico revisado por pares]

Kidlington: Elsevier Ltd

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5
A quasi-analytical model for nanowire FETs with arbitrary polygonal cross section
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A quasi-analytical model for nanowire FETs with arbitrary polygonal cross section

De Michielis, L. ; Selmi, L. ; Ionescu, A.M.

Solid-state electronics, 2010-09, Vol.54 (9), p.929-934 [Periódico revisado por pares]

Kidlington: Elsevier Ltd

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6
Electron mobility extraction in triangular gate-all-around Si nanowire junctionless nMOSFETs with cross-section down to 5 nm
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Electron mobility extraction in triangular gate-all-around Si nanowire junctionless nMOSFETs with cross-section down to 5 nm

NAJMZADEH, Mohammad ; BERTHOME, Matthieu ; SALLESE, Jean-Michel ; GRABINSKI, Wladek ; IONESCU, Adrian M

Solid-state electronics, 2014-08, Vol.98, p.55-62 [Periódico revisado por pares]

Kidlington: Elsevier

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7
Study on dual-lateral-gate suspended-body single-walled carbon nanotube field-effect transistors
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Study on dual-lateral-gate suspended-body single-walled carbon nanotube field-effect transistors

Cao, Ji ; Ionescu, Adrian M.

Solid-state electronics, 2012-08, Vol.74, p.121-125 [Periódico revisado por pares]

Elsevier Ltd

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8
Modeling and simulation of low power ferroelectric non-volatile memory tunnel field effect transistors using silicon-doped hafnium oxide as gate dielectric
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Modeling and simulation of low power ferroelectric non-volatile memory tunnel field effect transistors using silicon-doped hafnium oxide as gate dielectric

Saeidi, A. ; Biswas, A. ; Ionescu, Adrian M.

Solid-state electronics, 2016-10, Vol.124, p.16-23 [Periódico revisado por pares]

Elsevier Ltd

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9
Effect of the choice of the tunnelling path on semi-classical numerical simulations of TFET devices
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Effect of the choice of the tunnelling path on semi-classical numerical simulations of TFET devices

De Michielis, Luca ; Iellina, Matteo ; Palestri, Pierpaolo ; Ionescu, Adrian M. ; Selmi, Luca

Solid-state electronics, 2012-05, Vol.71, p.7-12 [Periódico revisado por pares]

Kidlington: Elsevier Ltd

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10
Electromechanical design space exploration for electrostatically actuated ohmic switches using extended parallel plate compact model
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Electromechanical design space exploration for electrostatically actuated ohmic switches using extended parallel plate compact model

Bazigos, Antonios ; Ayala, Christopher L. ; Rana, Sunil ; Grogg, Daniel ; Fernandez-Bolaños, Montserrat ; Hagleitner, Christoph ; Qin, Tian ; Pamunuwa, Dinesh ; Ionescu, Adrian M.

Solid-state electronics, 2014-09, Vol.99, p.93-100 [Periódico revisado por pares]

Kidlington: Elsevier Ltd

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