Result Number | Material Type | Add to My Shelf Action | Record Details and Options |
---|---|---|---|
1 |
Material Type: Artigo
|
A Comprehensive Phase Noise Analysis of Bang-Bang Digital PLLsAvallone, Luca ; Mercandelli, Mario ; Santiccioli, Alessio ; Kennedy, Michael Peter ; Levantino, Salvatore ; Samori, CarloIEEE transactions on circuits and systems. I, Regular papers, 2021-07, Vol.68 (7), p.2775-2786 [Periódico revisado por pares]New York: IEEETexto completo disponível |
|
2 |
Material Type: Artigo
|
A 23-GHz Low-Phase-Noise Digital Bang-Bang PLL for Fast Triangular and Sawtooth Chirp ModulationCherniak, Dmytro ; Grimaldi, Luigi ; Bertulessi, Luca ; Nonis, Roberto ; Samori, Carlo ; Levantino, SalvatoreIEEE journal of solid-state circuits, 2018-12, Vol.53 (12), p.3565-3575 [Periódico revisado por pares]New York: IEEETexto completo disponível |
|
3 |
Material Type: Artigo
|
A Novel LO Phase-Shifting System Based on Digital Bang-Bang PLLs With Background Phase-Offset Correction for Integrated Phased ArraysTesolin, Francesco ; Dartizio, Simone M. ; Buccoleri, Francesco ; Santiccioli, Alessio ; Bertulessi, Luca ; Samori, Carlo ; Lacaita, Andrea L. ; Levantino, SalvatoreIEEE journal of solid-state circuits, 2023-09, Vol.58 (9), p.1-12 [Periódico revisado por pares]New York: IEEETexto completo disponível |
|
4 |
Material Type: Ata de Congresso
|
10.1 An 8.75GHz Fractional-N Digital PLL with a Reverse-Concavity Variable-Slope DTC Achieving 57.3fsrms Integrated Jitter and −252.4dB FoMRossoni, Michele ; Dartizio, Simone Mattia ; Tesolin, Francesco ; Castoro, Giacomo ; Dell'Orto, Riccardo ; Samori, Carlo ; Lacaita, Andrea Leonardo ; Levantino, Salvatore2024 IEEE International Solid-State Circuits Conference (ISSCC), 2024, Vol.67, p.188-190IEEESem texto completo |
|
5 |
Material Type: Artigo
|
A Background Calibration Technique to Control the Bandwidth of Digital PLLsMercandelli, Mario ; Grimaldi, Luigi ; Bertulessi, Luca ; Samori, Carlo ; Lacaita, Andrea L. ; Levantino, SalvatoreIEEE journal of solid-state circuits, 2018-11, Vol.53 (11), p.3243-3255 [Periódico revisado por pares]New York: IEEETexto completo disponível |
|
6 |
Material Type: Artigo
|
Novel Feed-Forward Technique for Digital Bang-Bang PLL to Achieve Fast Lock and Low Phase NoiseBertulessi, Luca ; Cherniak, Dmytro ; Mercandelli, Mario ; Samori, Carlo ; Lacaita, Andrea L. ; Levantino, SalvatoreIEEE transactions on circuits and systems. I, Regular papers, 2022-05, Vol.69 (5), p.1858-1870 [Periódico revisado por pares]New York: IEEETexto completo disponível |
|
7 |
Material Type: Artigo
|
A 1.7 GHz Fractional-N Frequency Synthesizer Based on a Multiplying Delay-Locked LoopLevantino, Salvatore ; Marucci, Giovanni ; Marzin, Giovanni ; Fenaroli, Andrea ; Samori, Carlo ; Lacaita, Andrea L.IEEE journal of solid-state circuits, 2015-11, Vol.50 (11), p.2678-2691 [Periódico revisado por pares]New York: IEEETexto completo disponível |
|
8 |
Material Type: Artigo
|
A 1.6-to-3.0-GHz Fractional- MDLL With a Digital-to-Time Converter Range-Reduction Technique Achieving 397-fs Jitter at 2.5-mW PowerSanticcioli, Alessio ; Mercandelli, Mario ; Lacaita, Andrea L. ; Samori, Carlo ; Levantino, SalvatoreIEEE journal of solid-state circuits, 2019-11, Vol.54 (11), p.3149-3160 [Periódico revisado por pares]New York: IEEETexto completo disponível |
|
9 |
Material Type: Artigo
|
A Novel Topology of Coupled Phase-Locked LoopsKarman, Saleh ; Tesolin, Francesco ; Levantino, Salvatore ; Samori, CarloIEEE transactions on circuits and systems. I, Regular papers, 2021-03, Vol.68 (3), p.989-997 [Periódico revisado por pares]New York: IEEETexto completo disponível |
|
10 |
Material Type: Ata de Congresso
|
10.6 A 10GHz FMCW Modulator Achieving 680MHz/μs Chirp Slope and 150kHz rms Frequency Error Based on a Digital-PLL with a Non-Uniform Piecewise-Parabolic Digital PredistortionTesolin, Francesco ; Dartizio, Simone Mattia ; Castoro, Giacomo ; Buccoleri, Francesco ; Rossoni, Michele ; Cherniak, Dmytro ; Samori, Carlo ; Lacaita, Andrea Leonardo ; Levantino, Salvatore2024 IEEE International Solid-State Circuits Conference (ISSCC), 2024, Vol.67, p.198-200IEEESem texto completo |