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Refinado por: Nome da Publicação: Ieee Transactions On Very Large Scale Integration remover assunto: Technology remover
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Extracting secret keys from integrated circuits
Extracting secret keys from integrated circuits
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Extracting secret keys from integrated circuits

Daihyun Lim ; Lee, J.W. ; Gassend, B. ; Suh, G.E. ; van Dijk, M. ; Devadas, S.

IEEE transactions on very large scale integration (VLSI) systems, 2005-10, Vol.13 (10), p.1200-1205 [Periódico revisado por pares]

Piscataway, NJ: IEEE

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2
On-Chip Variability Sensor Using Phase-Locked Loop for Detecting and Correcting Parametric Timing Failures
On-Chip Variability Sensor Using Phase-Locked Loop for Detecting and Correcting Parametric Timing Failures
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On-Chip Variability Sensor Using Phase-Locked Loop for Detecting and Correcting Parametric Timing Failures

Kunhyuk Kang ; Sang Phill Park ; Keejong Kim ; Roy, K.

IEEE transactions on very large scale integration (VLSI) systems, 2010-02, Vol.18 (2), p.270-280 [Periódico revisado por pares]

New York, NY: IEEE

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3
Efficient On-Chip Crosstalk Avoidance CODEC Design
Efficient On-Chip Crosstalk Avoidance CODEC Design
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Efficient On-Chip Crosstalk Avoidance CODEC Design

Chunjie Duan ; Calle, V.H.C. ; Khatri, S.P.

IEEE transactions on very large scale integration (VLSI) systems, 2009-04, Vol.17 (4), p.551-560 [Periódico revisado por pares]

New York, NY: IEEE

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4
Active Filter-Based Hybrid On-Chip DC-DC Converter for Point-of-Load Voltage Regulation
Active Filter-Based Hybrid On-Chip DC-DC Converter for Point-of-Load Voltage Regulation
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Active Filter-Based Hybrid On-Chip DC-DC Converter for Point-of-Load Voltage Regulation

Kose, Selcuk ; Tam, S. ; Pinzon, S. ; McDermott, B. ; Friedman, E. G.

IEEE transactions on very large scale integration (VLSI) systems, 2013-04, Vol.21 (4), p.680-691 [Periódico revisado por pares]

New York, NY: IEEE

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5
A New ASIC Structure With Self-Repair Capability Using Field-Programmable Nanowire Interconnect Architecture
A New ASIC Structure With Self-Repair Capability Using Field-Programmable Nanowire Interconnect Architecture
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A New ASIC Structure With Self-Repair Capability Using Field-Programmable Nanowire Interconnect Architecture

Zandevakili, Hamed ; Mahani, Ali

IEEE transactions on very large scale integration (VLSI) systems, 2018-11, Vol.26 (11), p.2268-2278 [Periódico revisado por pares]

New York: IEEE

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6
A System Level Energy Model and Energy-Quality Evaluation for Integrated Transceiver Front-Ends
A System Level Energy Model and Energy-Quality Evaluation for Integrated Transceiver Front-Ends
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A System Level Energy Model and Energy-Quality Evaluation for Integrated Transceiver Front-Ends

Ye Li ; Bakkaloglu, B. ; Chakrabarti, C.

IEEE transactions on very large scale integration (VLSI) systems, 2007-01, Vol.15 (1), p.90-103 [Periódico revisado por pares]

Piscataway, NJ: IEEE

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7
Short Pulse Generation With On-Chip Pulse-Forming Lines
Short Pulse Generation With On-Chip Pulse-Forming Lines
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Short Pulse Generation With On-Chip Pulse-Forming Lines

Geng, Yongtao ; Zou, Huan ; Li, Chaojiang ; Sun, Jiwei ; Wang, Haibo ; Wang, Pingshan

IEEE transactions on very large scale integration (VLSI) systems, 2012-09, Vol.20 (9), p.1553-1564 [Periódico revisado por pares]

New York, NY: IEEE

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8
Coding for system-on-chip networks: a unified framework
Coding for system-on-chip networks: a unified framework
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Coding for system-on-chip networks: a unified framework

Sridhara, S.R. ; Shanbhag, N.R.

IEEE transactions on very large scale integration (VLSI) systems, 2005-06, Vol.13 (6), p.655-667 [Periódico revisado por pares]

Piscataway, NJ: IEEE

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9
UDSM Trends Comparison: From Technology Roadmap to UltraSparc Niagara2
UDSM Trends Comparison: From Technology Roadmap to UltraSparc Niagara2
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UDSM Trends Comparison: From Technology Roadmap to UltraSparc Niagara2

Pulimeno, A. ; Graziano, M. ; Piccinini, G.

IEEE transactions on very large scale integration (VLSI) systems, 2012-07, Vol.20 (7), p.1341-1346 [Periódico revisado por pares]

New York, NY: IEEE

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10
Efficient CODEC Designs for Crosstalk Avoidance Codes Based on Numeral Systems
Efficient CODEC Designs for Crosstalk Avoidance Codes Based on Numeral Systems
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Efficient CODEC Designs for Crosstalk Avoidance Codes Based on Numeral Systems

Wu, Xuebin ; Yan, Zhiyuan

IEEE transactions on very large scale integration (VLSI) systems, 2011-04, Vol.19 (4), p.548-558 [Periódico revisado por pares]

New York, NY: IEEE

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