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Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation-Part I: CNFET Transistor Optimization
Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation-Part I: CNFET Transistor Optimization
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Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation-Part I: CNFET Transistor Optimization

Chen, Rongmei ; Chen, Lin ; Liang, Jie ; Cheng, Yuanqing ; Elloumi, Souhir ; Lee, Jaehyun ; Xu, Kangwei ; Georgiev, Vihar P. ; Ni, Kai ; Debacker, Peter ; Asenov, Asen ; Todri-Sanial, Aida

IEEE transactions on very large scale integration (VLSI) systems, 2022-04, Vol.30 (4), p.432-439 [Periódico revisado por pares]

New York: IEEE

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2
Impact of the Figures of Merit (FoMs) Definitions on the Variability in Nanowire TFET: NEGF Simulation Study
Impact of the Figures of Merit (FoMs) Definitions on the Variability in Nanowire TFET: NEGF Simulation Study
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Impact of the Figures of Merit (FoMs) Definitions on the Variability in Nanowire TFET: NEGF Simulation Study

Guan, Yunhe ; Georgiev, Vihar P. ; Asenov, Asen ; Liang, Feng ; Chen, Haifeng

IEEE transactions on electron devices, 2022-11, Vol.69 (11), p.6394-6399 [Periódico revisado por pares]

New York: IEEE

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3
An Accurate Analytical Model for Tunnel FET Output Characteristics
An Accurate Analytical Model for Tunnel FET Output Characteristics
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An Accurate Analytical Model for Tunnel FET Output Characteristics

Guan, Yunhe ; Li, Zunchao ; Carrillo-Nunez, Hamilton ; Zhang, Yefei ; Georgiev, Vihar P. ; Asenov, Asen ; Liang, Feng

IEEE electron device letters, 2019-06, Vol.40 (6), p.1001-1004 [Periódico revisado por pares]

New York: IEEE

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4
Multisubband Ensemble Monte Carlo Analysis of Tunneling Leakage Mechanisms in Ultrascaled FDSOI, DGSOI, and FinFET Devices
Multisubband Ensemble Monte Carlo Analysis of Tunneling Leakage Mechanisms in Ultrascaled FDSOI, DGSOI, and FinFET Devices
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Multisubband Ensemble Monte Carlo Analysis of Tunneling Leakage Mechanisms in Ultrascaled FDSOI, DGSOI, and FinFET Devices

Medina-Bailon, Cristina ; Padilla, Jose L. ; Sadi, Toufik ; Sampedro, Carlos ; Godoy, Andres ; Donetti, Luca ; Georgiev, Vihar P. ; Gamiz, Francisco ; Asenov, Asen

IEEE transactions on electron devices, 2019-03, Vol.66 (3), p.1145-1152 [Periódico revisado por pares]

New York: IEEE

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5
Optimization and Evaluation of Variability in the Programming Window of a Flash Cell With Molecular Metal-Oxide Storage
Optimization and Evaluation of Variability in the Programming Window of a Flash Cell With Molecular Metal-Oxide Storage
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Optimization and Evaluation of Variability in the Programming Window of a Flash Cell With Molecular Metal-Oxide Storage

Georgiev, Vihar P. ; Markov, Stanislav ; Vila-Nadal, Laia ; Busche, Christoph ; Cronin, Leroy ; Asenov, Asen

IEEE transactions on electron devices, 2014-06, Vol.61 (6), p.2019-2026 [Periódico revisado por pares]

New York: IEEE

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6
Impact of Precisely Positioned Dopants on the Performance of an Ultimate Silicon Nanowire Transistor: A Full Three-Dimensional NEGF Simulation Study
Impact of Precisely Positioned Dopants on the Performance of an Ultimate Silicon Nanowire Transistor: A Full Three-Dimensional NEGF Simulation Study
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Impact of Precisely Positioned Dopants on the Performance of an Ultimate Silicon Nanowire Transistor: A Full Three-Dimensional NEGF Simulation Study

Georgiev, V. P. ; Towie, E. A. ; Asenov, A.

IEEE transactions on electron devices, 2013-03, Vol.60 (3), p.965-971 [Periódico revisado por pares]

New York, NY: IEEE

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7
Simulation Study of the Impact of Quantum Confinement on the Electrostatically Driven Performance of n-type Nanowire Transistors
Simulation Study of the Impact of Quantum Confinement on the Electrostatically Driven Performance of n-type Nanowire Transistors
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Simulation Study of the Impact of Quantum Confinement on the Electrostatically Driven Performance of n-type Nanowire Transistors

Yijiao Wang ; Al-Ameri, Talib ; Xingsheng Wang ; Georgiev, Vihar P. ; Towie, Ewan ; Amoroso, Salvatore Maria ; Brown, Andrew R. ; Cheng, Binjie ; Reid, David ; Riddet, Craig ; Shifren, Lucian ; Sinha, Saurabh ; Yeric, Greg ; Aitken, Robert ; Xiaoyan Liu ; Jinfeng Kang ; Asenov, Asen

IEEE transactions on electron devices, 2015-10, Vol.62 (10), p.3229-3236 [Periódico revisado por pares]

New York: IEEE

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8
Inverse Scaling Trends for Charge-Trapping-Induced Degradation of FinFETs Performance
Inverse Scaling Trends for Charge-Trapping-Induced Degradation of FinFETs Performance
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Inverse Scaling Trends for Charge-Trapping-Induced Degradation of FinFETs Performance

Amoroso, Salvatore Maria ; Georgiev, Vihar P. ; Gerrer, Louis ; Towie, Ewan ; Xingsheng Wang ; Riddet, Craig ; Brown, Andrew Robert ; Asenov, Asen

IEEE transactions on electron devices, 2014-12, Vol.61 (12), p.4014-4018 [Periódico revisado por pares]

New York: IEEE

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9
Impact of Randomly Distributed Dopants on \Omega -Gate Junctionless Silicon Nanowire Transistors
Impact of Randomly Distributed Dopants on \Omega -Gate Junctionless Silicon Nanowire Transistors
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Impact of Randomly Distributed Dopants on \Omega -Gate Junctionless Silicon Nanowire Transistors

Carrillo-Nunez, Hamilton ; Mirza, Muhamad M. ; Paul, Douglas J. ; MacLaren, Donald A. ; Asenov, Asen ; Georgiev, Vihar P.

IEEE transactions on electron devices, 2018-05, Vol.65 (5), p.1692-1698 [Periódico revisado por pares]

IEEE

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10
Experimental and Simulation Study of Silicon Nanowire Transistors Using Heavily Doped Channels
Experimental and Simulation Study of Silicon Nanowire Transistors Using Heavily Doped Channels
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Experimental and Simulation Study of Silicon Nanowire Transistors Using Heavily Doped Channels

Georgiev, Vihar P. ; Mirza, Muhammad M. ; Dochioiu, Alexandru-Iustin ; Adamu-Lema, Fikru ; Amoroso, Salvatore M. ; Towie, Ewan ; Riddet, Craig ; MacLaren, Donald A. ; Asenov, Asen ; Paul, Douglas J.

IEEE transactions on nanotechnology, 2017-09, Vol.16 (5), p.727-735 [Periódico revisado por pares]

IEEE

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