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1
Frequency-domain behavioural noise analysis of analogue phase-locked loops
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Frequency-domain behavioural noise analysis of analogue phase-locked loops

Abtahi, Seyed Ahmad ; Jahanbakht, Sajad

IET microwaves, antennas & propagation, 2020-11, Vol.14 (14), p.1909-1917 [Periódico revisado por pares]

The Institution of Engineering and Technology

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2
Demodulation type single-phase PLL with DC offset rejection
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Demodulation type single-phase PLL with DC offset rejection

Ahmed, H ; Benbouzid, M

Electronics letters, 2020-03, Vol.56 (7), p.344-347 [Periódico revisado por pares]

The Institution of Engineering and Technology

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3
Synchronous reference frame single-phase phase-locked loop (PLL) algorithm based on half-cycle DFT
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Synchronous reference frame single-phase phase-locked loop (PLL) algorithm based on half-cycle DFT

Xia, Tao ; Zhang, Xu ; Tan, Guojun ; Liu, Yezhao

IET power electronics, 2020-07, Vol.13 (9), p.1893-1900 [Periódico revisado por pares]

The Institution of Engineering and Technology

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4
Simple ladder-like single-layer balanced wideband phase shifter with wide phase shift range and appropriate common-mode suppression
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Simple ladder-like single-layer balanced wideband phase shifter with wide phase shift range and appropriate common-mode suppression

Karim Alizadeh, Mohammad ; Shamsi, Hossein ; Bagher Tavakoli, Mohammad ; Aliakbarian, Hadi

IET microwaves, antennas & propagation, 2020-08, Vol.14 (10), p.1137-1147 [Periódico revisado por pares]

The Institution of Engineering and Technology

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5
Independent-phase current control of a three-phase VSC under unbalanced operating conditions
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Independent-phase current control of a three-phase VSC under unbalanced operating conditions

Shi, Xianghua ; Filizadeh, Shaahin

Journal of engineering (Stevenage, England), 2019-03, Vol.2019 (16), p.1338-1345 [Periódico revisado por pares]

The Institution of Engineering and Technology

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6
Design criterion and guidelines for three-phase asymmetric coupled inductors in interleaving DC/DC converter for VRM in data centres and POL
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Design criterion and guidelines for three-phase asymmetric coupled inductors in interleaving DC/DC converter for VRM in data centres and POL

Yang, Yugang ; Wu, Yanqiu ; Sun, Xiaoyu ; Han, Xiaoqing

IET power electronics, 2020-10, Vol.13 (13), p.2854-2865 [Periódico revisado por pares]

The Institution of Engineering and Technology

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7
Analysis of stability of two-phase flow mechanical seal with spiral groove under high speeds
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Analysis of stability of two-phase flow mechanical seal with spiral groove under high speeds

Jin, Jie ; Peng, Xu-Dong ; Meng, Xiang-Kai ; Zhao, Wen-Jing ; Jiang, Jin-Bo

Journal of the Brazilian Society of Mechanical Sciences and Engineering, 2021-05, Vol.43 (5), Article 260

Berlin/Heidelberg: Springer Berlin Heidelberg

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8
Efficient implementation and performance improvement of three-phase EPLL under non-ideal grid conditions
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Efficient implementation and performance improvement of three-phase EPLL under non-ideal grid conditions

Sevilmiş, Fehmi ; Karaca, Hulusi

IET power electronics, 2020-09, Vol.13 (12), p.2492-2499 [Periódico revisado por pares]

The Institution of Engineering and Technology

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9
Harmonic compensation method using single-phase cascaded H-bridge converters
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Harmonic compensation method using single-phase cascaded H-bridge converters

Wang, Ruiqi ; Xu, Wei ; Shi, Xin ; Li, Sun ; Wang, Chao ; Lyu, Weilong ; Liang, Jian ; Du, Liyang

Journal of engineering (Stevenage, England), 2019-03, Vol.2019 (16), p.1589-1593 [Periódico revisado por pares]

The Institution of Engineering and Technology

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10
All-Optical Regeneration and Format Conversion For 4APSK Signals Based on Nonlinear Effects in HNLF
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All-Optical Regeneration and Format Conversion For 4APSK Signals Based on Nonlinear Effects in HNLF

Li, Qiankun ; Wen, Huashun ; Yang, Jiali ; Xu, Qi ; Yang, Xiongwei ; Li, Yameng

IEEE photonics journal, 2023-02, Vol.15 (1), p.1-9 [Periódico revisado por pares]

Piscataway: IEEE

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