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1
Optimal Generalized H-Tree Topology and Buffering for High-Performance and Low-Power Clock Distribution
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Optimal Generalized H-Tree Topology and Buffering for High-Performance and Low-Power Clock Distribution

Han, Kwangsoo ; Kahng, Andrew B. ; Li, Jiajia

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-02, Vol.39 (2), p.478-491 [Periódico revisado por pares]

New York: IEEE

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2
Synthesis of Tamper-Resistant Pin-Constrained Digital Microfluidic Biochips
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Synthesis of Tamper-Resistant Pin-Constrained Digital Microfluidic Biochips

Tang, Jack ; Ibrahim, Mohamed ; Chakrabarty, Krishnendu ; Karri, Ramesh

IEEE transactions on computer-aided design of integrated circuits and systems, 2020-01, Vol.39 (1), p.171-184 [Periódico revisado por pares]

New York: IEEE

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3
EigenCircuit: Divergent Synthetic Benchmark Generation for Hardware Security Using PCA and Linear Programming
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EigenCircuit: Divergent Synthetic Benchmark Generation for Hardware Security Using PCA and Linear Programming

Amir, Sarah ; Forte, Domenic

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-12, Vol.41 (12), p.5207-5219 [Periódico revisado por pares]

New York: IEEE

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4
Optimization of Multi-Target Sample Preparation On-Demand With Digital Microfluidic Biochips
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Optimization of Multi-Target Sample Preparation On-Demand With Digital Microfluidic Biochips

Poddar, Sudip ; Bhattacharjee, Sukanta ; Nandy, Subhas C. ; Chakrabarty, Krishnendu ; Bhattacharya, Bhargab B.

IEEE transactions on computer-aided design of integrated circuits and systems, 2019-02, Vol.38 (2), p.253-266 [Periódico revisado por pares]

New York: IEEE

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5
Effective Logic Synthesis for Threshold Logic Circuit Design
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Effective Logic Synthesis for Threshold Logic Circuit Design

Neutzling, Augusto ; Matos, Jody Maick ; Mishchenko, Alan ; Reis, Andre ; Ribas, Renato P.

IEEE transactions on computer-aided design of integrated circuits and systems, 2019-05, Vol.38 (5), p.926-937 [Periódico revisado por pares]

New York: IEEE

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6
AIoTML: A Unified Modeling Language for AIoT-Based Cyber-Physical Systems
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AIoTML: A Unified Modeling Language for AIoT-Based Cyber-Physical Systems

Hu, Ming ; Cao, E ; Huang, Hongbing ; Zhang, Min ; Chen, Xiaohong ; Chen, Mingsong

IEEE transactions on computer-aided design of integrated circuits and systems, 2023-11, Vol.42 (11), p.1-1 [Periódico revisado por pares]

New York: IEEE

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7
Optimal design of a CMOS op-amp via geometric programming
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Optimal design of a CMOS op-amp via geometric programming

Hershenson, M.delM ; Boyd, S.P. ; Lee, T.H.

IEEE transactions on computer-aided design of integrated circuits and systems, 2001-01, Vol.20 (1), p.1-21 [Periódico revisado por pares]

New York: IEEE

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8
Exact and Approximate Algorithms for the Optimization of Area and Delay in Multiple Constant Multiplications
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Exact and Approximate Algorithms for the Optimization of Area and Delay in Multiple Constant Multiplications

Aksoy, L. ; da Costa, E. ; Flores, P. ; Monteiro, J.

IEEE transactions on computer-aided design of integrated circuits and systems, 2008-06, Vol.27 (6), p.1013-1026 [Periódico revisado por pares]

New York: IEEE

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9
NRC: A Nibble Remapping Coding Strategy for NAND Flash Reliability Extension
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NRC: A Nibble Remapping Coding Strategy for NAND Flash Reliability Extension

Wei, Debao ; Deng, Libao ; Zhang, Peng ; Qiao, Liyan ; Peng, Xiyuan

IEEE transactions on computer-aided design of integrated circuits and systems, 2016-11, Vol.35 (11), p.1942-1946 [Periódico revisado por pares]

New York: IEEE

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10
ILP-Based Pin-Count Aware Design Methodology for Microfluidic Biochips
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ILP-Based Pin-Count Aware Design Methodology for Microfluidic Biochips

Lin, Cliff Chiung-Yu ; Yao-Wen Chang

IEEE transactions on computer-aided design of integrated circuits and systems, 2010-09, Vol.29 (9), p.1315-1327 [Periódico revisado por pares]

New York: IEEE

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