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Automatic topology selection and sizing of Class-D loop-filters for minimizing distortion

Guilherme, D ; Guilherme, J ; Horta, N

2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD), October 2010, pp.1-4

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  • Título:
    Automatic topology selection and sizing of Class-D loop-filters for minimizing distortion
  • Autor: Guilherme, D ; Guilherme, J ; Horta, N
  • Assuntos: Optimization ; Topology ; Power Harmonic Filters ; Numerical Models ; Active Filters ; Integrated Circuit Modeling ; Gain
  • É parte de: 2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD), October 2010, pp.1-4
  • Descrição: This paper presents an optimization methodology for continuous time loop-filters design applied to Class-D amplifiers. The methodology is based on an evolutionary optimization approach which integrates both the topology selection and circuit sizing by automatically generating optimal sized topologies and performance tradeoffs for the Class-D amplifier. The presented approach is demonstrated for the design of an half-bridge Class-D loop filter topology for portable applications that achieves less than 0.005% THD at 340mW output power with a 3.3V supply in typical 0.18um CMOS technology.
  • Idioma: Inglês

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