Concordant memory design: an integrated statistical design approach for multi-gigabit DRAM

Akiyama, S. ; Sekiguchi, T. ; Kajigaya, K. ; Hanzawa, S. ; Takemura, R. ; Kawahara, T.

IEEE journal of solid-state circuits, 2006-01, Vol.41 (1), p.107-112 [Periódico revisado por pares]

New York, NY: IEEE

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